Tag: x86

Found 185 results for 'x86'.

1) c++ - Why are elementwise additions much faster in separate loops than in a combined loop?
2) linux - Linux Kernel ROP - Returning to userland from kernel context?
3) exploit - Return oriented programming without int 0x80
4) linux - How to mitigate the Spectre and Meltdown vulnerabilities on Linux systems?
5) c++ - Replacing a 32-bit loop counter with 64-bit introduces crazy performance deviations with _mm_popcnt_u64 on Intel CPUs
6) linux - What lies behind this complicated shellcode on linux?
7) c++ - Why does C++ code for testing the Collatz conjecture run faster than hand-written assembly?
8) process - Files bigger than max(off64_t) on Solaris, eg "/proc/../as"
9) optimization - What Every Programmer Should Know About Memory?
10) assembly - Add a constant value to a xmm register in x86
11) c++ - Why are elementwise additions much faster in separate loops than in a combined loop?
12) dynamic-linking - ld.so.preload doesn't differ x86_32 and x86_64
13) memory - How to align on both word size and cache lines in x86
14) performance - Do sse instructions consume more power/energy?
15) linux - Can ptrace tell if an x86 system call used the 64-bit or 32-bit ABI?
16) c - Can x86's MOV really be "free"? Why can't I reproduce this at all?
17) c++ - Fastest implementation of sine, cosine and square root in C++ (doesn't need to be much accurate)
18) performance - How are x86 uops scheduled, exactly?
19) c - What is exactly the base pointer and stack pointer? To what do they point?
20) c++ - Boolean values as 8 bit in compilers. Are operations on them inefficient?
21) linux - How to detect and mitigate the Intel escalation of privilege vulnerability on a Linux system (CVE-2017-5689)?
22) c - Observing stale instruction fetching on x86 with self-modifying code
23) c - How to prove that AND instruction is faster than IDIV on a commodity Intel x86
24) assembly - x86 BSWAP instruction REX doesn't follow Intel specs?
25) c++ - Is `reinterpret_cast`ing between hardware SIMD vector pointer and the corresponding type an undefined behavior?
26) memory - How do cache lines work?
27) performance - How are x86 uops scheduled, exactly?
28) performance - Assembly - How to score a CPU instruction by latency and throughput
29) assembly - Assembly Language - How to do Modulo?
30) kali-linux - bash: ./idaq: No such file or directory
31) c - Floating multiplication performing slower depending of operands in C
32) performance - Why does breaking the "output dependency" of LZCNT matter?
33) linux - Linux Permissions UID 0 vs Ring 0
34) assembly - How to know which integer register to use
35) security - Has Hardware Lock Elision gone forever due to Spectre Mitigation?
36) macos - How can I use mach_absolute_time without overflowing?
37) penetration-test - Android x86 vs Android on Qemu ARM
38) c - How do I sum the four 2-bit bitfields in a single 8-bit byte?
39) x86 - How does x86 paging work?
40) linux - Understanding the CPU time spent by process in user/kernel space
41) x86 - Correctly disable Hardware Prefetching with MSR in Skylake
42) c++ - Does the MOV x86 instruction implement a C++11 memory_order_release atomic store?
43) assembly - Understanding cmp instruction
44) x86 - How to disable L3 cache prefetcher on Intel Xeon Scalable Processor?
45) x86 - Counting machine instructions using gdb
46) assembly - Registers and Stacks in NASM
47) x86 - When to do or not do INVLPG, MOV to CR3 to minimize TLB flushing
48) assembly - Intel x86 - Interrupt Service Routine responsibility
49) assembly - Function call in x86 Assembly Language
50) cpu - The difference between accumulator-based and register-based CPU architecture?